Power Semiconductor Design

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Across Si, SiC, and GaN platforms, we design around the switch — optimizing for speed, thermal behavior, reliability, and compliance.

At MarSum Solutions, device selection is tightly coupled with parasitics, EMI mitigation, thermal behavior, gate drive strategy, and real-world manufacturability. We work from the physics up — ensuring that each switch meets not just datasheet performance, but true application demands.

Our designs are engineered for harsh environments, tight EMI limits, and thermally constrained packaging — from high-current traction inverters to compact consumer power stages.

We integrate devices based on application constraints and switching performance, balancing cost, ruggedness, and layout footprint.

• Silicon Carbide (SiC) – High-voltage, high-frequency MOSFETs with ultra-fast body-diode recovery
• Gallium Nitride (GaN) – Compact, high-efficiency power stages up to tens of kilowatts
• IGBTs & Traditional MOSFETs – Proven platforms for cost-sensitive or legacy industrial systems
• Thyristors & Diodes – For high-voltage or rugged power converter front ends
• Super-junction MOSFETs (SJ-MOSFETs), Cascode, Hybrid SiC – For specialized switching behavior and efficiency
   

We work across discrete and modular formats:

• IPMs, PIMs, and press-fit modules
• Overmolded, surface-mount, and through-hole
• ACEPACK, EasyPACK, EconoPACK, CIPOS, SLLIMM, DIPIPM, TO-220/247, H2PAK‑7L (Infineon), and more
   

Each package is evaluated for:

• Thermal resistance (RθJC / RθJA), including TIM aging and mounting force effects
• Parasitic loop inductance and mutual coupling
• Surge current handling, reverse recovery, and tail current dissipation
• Connector footprint, height constraints, and vibration durability

We design gate drivers to complement the switch — ensuring reliable turn-on, protection during fault conditions, and clean transitions.

• Turn-on/off shaping with programmable di/dt and dv/dt control
• Active Miller clamp, soft turn-off, and gate-source overvoltage protection
• Desaturation detection with adjustable blanking and fast fault shutdown
• Two-stage (+18V/–5V) or three-level gate drive schemes for SiC MOSFETs
• Galvanic isolation via optical, capacitive, or transformer-coupled methods
• Short-circuit withstand tuning and gate resistor optimization
   

Special considerations include:

• Dead-time control to avoid shoot-through
• Negative gate bias and timing control to minimize third-quadrant conduction in GaN HEMTs
• Delay matching between high- and low-side switches
• Compact gate drive PCB layout and GND return routing

Switching behavior is validated through simulation and lab characterization across real-world operating conditions. 

• Turn-on/turn-off switching analysis for overshoot, ringing, and tail current
• Parasitic inductance extraction from layout and bonding structure
• Snubber design (RC/RCD) using real-world Vds/Vgs traces
• Loss modeling: conduction, switching, and reverse recovery
• Junction-to-ambient thermal stack simulation, including TIM aging and interface resistance
• SOA validation under hard short-circuit and thermal stress
   

Tools & Platforms:

• LTspice®, PSpice®, PSIM for electrical simulation
• ANSYS® Icepak, Sigrity® PowerDC, and PowerSI for thermal and EMI stackup analysis
• In-house high-speed waveform capture for >100 MHz edge transitions

Device behavior is tightly coupled to EMI — we optimize layout and switching to reduce emissions at the source.

• Compact switch-node layout and copper balancing for reduced dv/dt
• Optimized loop area and return path planning to minimize common-mode noise
• Input/output filter design tied to specific converter topology and modulation method
• Radiated emissions mitigated through shielding, decoupling, and chassis bonding
   

Compliance standards we support include:

• CISPR 25 (vehicular)
• CISPR 32 / 11 (industrial and ITE)
• EN 61800-3 (adjustable-speed drives)
• FCC Part 15 (consumer)
• SAE J1113-42 / -12 (vehicular EMC subsets)
   

We also support:

• Simulation-based pre-compliance checking
• Full design-for-compliance PCB and cabling rules
• MOV, TVS, and clamp diode selection for transient protection
• Conducted emissions filtering (CM/DM choke design, X/Y capacitor tuning)

Power stage design is always application-specific. We tailor tradeoffs to system-level constraints.

• Traction Inverters – High-current SiC with optimized switching loss; hard- or soft-switched as needed
• HVAC Drives – Compact GaN or SJ-MOSFETs for high-frequency, low-noise operation
• Aerospace Platforms – Weight-optimized layouts with EMI shielding and thermal validation
• Industrial VFDs – Ruggedized systems with field-replaceable modules and fault-tolerant drives
• Modular Power Blocks – Designed for manufacturability, with PCB-to-heatsink stack analysis